The CDP is built around Cognovo’s CDC160 development chip which includes MCE 160 with 6 Vector Signal Processor (VSP) cores; an ARM Cortex R4 CPU; dual Turbo Decoders; and a multi-channel IQ interface to support RF integration.

CDC160 also features a second ARM Cortex R4 Protocol Stack CPU with external I/O for debug and trace and a Gbit/s data interface, allowing full modem and protocol stack development and integration.

Operating at 300MHz, the device achieves an unprecedented 120GMAC/s (250Gops/s) of performance at low power.

Key Features

• Supports real-time development and validation for all wireless standards
• Software Defined Modem IC (CDC160)
• Fully code compatible with MCE system model for rapid software integration
• Fully integrated with ARM code development suite and Coresight debug & trace tool chain
• Programmable FPGA interface supports integration with MIMO, multi-carrier and multi-mode RFIC designs with multi-sourced clocks and PLL settings
• System Controller covering 35 Power Domains and Deep Sleep Power down