Traditional Design Flow
SDM Design Flow
A key part of the design phase is to partition the design across the resources of the target platform whilst ensuring all relevant constraints are met. This is where the traditional hardware centric approach starts to become inefficient and challenging. Since Layer 1 has three distinct operating requirements (see SDM Overview) the implementation phase requires three distinct development activities: Logical Layer1, Sub-frame Sequencing and Signal Processing.
Traditional Design Flow
In a traditional modem design flow Logical Layer 1 is developed in software, the intensive signal processing work is implemented in ASIC gate hardware design, and subframe sequencing is typically split between both hardware and software. This leads to a complicated co-design activity and usually requires prototype hardware to be built. This parallel and interdependent hardware / software design and implementation process typically leads to two or more re-development phases and silicon device re-spins. Furthermore, the Logical Layer 1 and Sub-frame software will need to be modified as the hardware evolves from FPGA prototype to first silicon and subsequent production silicon.
SDM Design Flow
With an SDM approach, all of the modem specific work is carried out in software, with the (processor) hardware implementation fully decoupled and only taking input in the form of Power, Performance and Area requirements. As a result, there is no need for any re-spins of software or hardware and the original algorithm R&D can be directly carried forward into product development and validation.
However, this approach creates a need for powerful tools to assist system level integration, constraint optimisation and validation and this is precisely why Cognovo have developed the SDM System SDK.
